The present invention relates to integrated circuits (ICs) and, more particularly, to input/output (IO) pads for IC dies.
FIG. 1 is a simplified top plan view of a conventional IC die 100 having (e.g., nine) side input/output (IO) pads 110 on each side of the die interior 120. The four areas 130 corresponding to the four corners of the IC die 100 do not have any IO pads.
FIG. 2 is a simplified top plan view of the lower right corner of the IC die 100 of FIG. 1. In FIG. 2, label 112 represents the passivation region in the top metal layer (TML) of the IC die 100 corresponding to the side IO pads 110, while label 114 represents the center of the bond area within the passivation region 112 that would receive a bond wire (not shown). Each dashed box in FIG. 2 represents the footprint of the corresponding side IO pad 110 taking into account all of the layers within the IC die 100 corresponding to the side IO pad 110.
In a conventional side IO pad, like the side IO pads 110, the electrical signal (e.g., data or power) flows (i) vertically between the TML passivation region 112 and one or more non-TML pad regions (not shown) in metal layers below the top metal layer and (ii) horizontally between the non-TML pad regions and the die interior 120. As indicated in FIG. 2, the footprints of the two side IO pads 110 that are adjacent to the die corner 130 almost touch each other at their pad corners 116 such that electrical signals cannot be routed between the die interior 120 and the die corner 130. That is why conventional IC dies, like the IC die 100, do not have IO pads in their corner regions 130. However, it would be advantageous to be able to use these corner spaces for IO pads.